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cloud
g1-g2-ostack-cloud-migration
Commits
b0e9fc45
Commit
b0e9fc45
authored
8 months ago
by
František Řezníček
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feat: correct g1->g2 flavor mapping
parent
bd59ded5
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Pipeline
#537028
passed
8 months ago
Stage: test
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CHANGELOG.md
+4
-0
4 additions, 0 deletions
CHANGELOG.md
ci/olib.py
+6
-6
6 additions, 6 deletions
ci/olib.py
with
10 additions
and
6 deletions
CHANGELOG.md
+
4
−
0
View file @
b0e9fc45
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@@ -6,6 +6,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
## [Unreleased]
## [1.8.1] - 2024-11-14
### Changed
-
flavor mapping, ensure std flavors are being mapped into e1 ones
## [1.8.0] - 2024-10-17
### Changed
-
Modified the volume migration procedure - add option to skip the deep-copy step, in order to speed up the procedure:
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ci/olib.py
+
6
−
6
View file @
b0e9fc45
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@@ -89,20 +89,20 @@ def get_destination_flavor(source_flavor):
'
hpc.xlarge
'
:
None
,
# neni v G2
'
hpc.xlarge-memory
'
:
'
c3.xlarge-memory
'
,
# neni v G2
'
elixir.60core-128ram
'
:
'
c3.60core-120ram
'
,
'
standard.16core-32ram
'
:
'
g2.2xlarge
'
,
# ok
'
standard.16core-32ram
'
:
'
e1.16core-30ram
'
,
# ok
'
standard.20core-128ram
'
:
'
e1.20core-128ram
'
,
# neni potreba
'
standard.20core-256ram
'
:
'
e1.20core-256ram
'
,
# neni v G2
'
standard.2core-16ram
'
:
'
c3
.2core-16ram
'
,
# ok
'
standard.2core-16ram
'
:
'
e1
.2core-16ram
'
,
# ok
'
standard.large
'
:
'
e1.large
'
,
# ok pripadne jeste c3.4core-8ram
'
standard.medium
'
:
'
e1.medium
'
,
# o 2 vice CPU
'
standard.memory
'
:
'
c3
.2core-30ram
'
,
#
pripadne i c2.2core-30ram
'
standard.one-to-many
'
:
'
c3
.2
4
core-60ram
'
,
#
v G2 je o 4 vice CPU
'
standard.memory
'
:
'
e1
.2core-30ram
'
,
#
ok
'
standard.one-to-many
'
:
'
e1
.2
0
core-60ram
'
,
#
ok
'
standard.small
'
:
'
e1.small
'
,
# 2x vice ram a CPU u G2
'
standard.tiny
'
:
'
e1.tiny
'
,
# 2x vice ram a CPU u G2
'
standard.xlarge
'
:
'
e1.2xlarge
'
,
# o 4 vice CPU G2
'
standard.xlarge-cpu
'
:
'
e1.2xlarge
'
,
# ok
'
standard.xxlarge
'
:
'
c2
.8core-30ram
'
,
# ok
'
standard.xxxlarge
'
:
'
c3
.8core-60ram
'
,
# ok
'
standard.xxlarge
'
:
'
e1
.8core-30ram
'
,
# ok
'
standard.xxxlarge
'
:
'
e1
.8core-60ram
'
,
# ok
'
csirtmu.tiny1x2
'
:
'
g2.1core-2ram
'
,
# ok
'
csirtmu.tiny1x4
'
:
'
g2.1core-4ram
'
,
# ok
'
csirtmu.small2x4
'
:
'
g2.2core-4ram
'
,
# ok
...
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